1. Field
Exemplary embodiments relate to a semiconductor device and an electronic device including the same, and more particularly, to a semiconductor device including a variable resistance layer which is capable of switching between two different resistance states in response to an applied voltage or current, and an electronic device including the same.
2. Description of the Related Art
A variable resistance memory device, of which the resistance changes according to an external stimulus, switches between two or more resistance states so as to store data, and includes a resistive random access memory (ReRAM), a phase change RAM (PCRAM), a spin transfer torque-RAM (STT-RAM) and the like. In particular, the variable resistance memory device may have a simple structure and have a variety of excellent characteristics such as nonvolatility. Thus, extensive research has been conducted on the variable resistance memory device.
FIG. 1 is a cross-sectional view of a conventional semiconductor device.
Referring to FIG. 1, a ReRAM of variable resistance memory devices has a structure in which a variable resistance layer 20 is interposed between first and second electrodes 10 and 30. The variable resistance layer 20 may include a perovskite-based material or transition metal oxide (TMO) of which electric resistance is changed by migration of oxygen vacancies or ions.
FIGS. 2A to 2D are cross-sectional views for explaining the switching mechanism of the conventional semiconductor device.
Referring to FIG. 2A, when a forming voltage is applied to the variable resistance layer 20 through the first and second electrodes 10 and 30, a filament-shaped current path C which is formed by migration or rearrangement of oxygen vacancies or ions is initially generated in the variable resistance layer 20. Then, the variable resistance layer 20 may be set in a low resistance state (LRS).
Referring to FIG. 2B, when a reset voltage is applied to the variable resistance layer 20 through the first and the second electrodes 10 and 30, the current path C formed in the variable resistance layer 20 is cut off. Then, the variable resistance layer 20 may be set in a high resistance state (HRS).
Referring to FIG. 2C, when a set voltage is applied to the variable resistance layer 20 through the first and the second electrodes 10 and 30, a current path C is regenerated in the variable resistance layer 20. Then, the variable resistance layer 20 may be set in the LRS. At this time, since oxygen vacancies or ions forming the current path C are non-uniformly distributed, the current path C is randomly generated.
Referring to FIG. 2D, when the reset voltage is applied to the variable resistance layer 20 through the first and the second electrodes 10 and 30, the variable resistance layer 20 is set in the HRS. Then, when the set voltage is applied again, a current path C is regenerated in the variable resistance layer 20, and the variable resistance layer 20 may be set in the LRS. As described above, however, the current path C is randomly generated. In other words, it may be difficult to regenerate the current path C at a specific location of the variable resistance layer 20. Thus, although the same set voltage is applied to the variable resistance layer 20 on multiple occasions, the positions and numbers of the current path C formed in the variable resistance layer 20 may be different in every occasion. Therefore, the resistance switching characteristics may become non-uniform even when the set voltage/current and the reset voltage/current are applied at constant levels. As a result, the durability and reliability of the semiconductor device may be reduced.